NextGen-Malloc: Giving Memory Allocator Its Own Room in the House

Article describes how memory allocation and management have a significant impact on performance and energy of modern applications. The authors observe that performance can vary by as much as 72% in some applications based on which memory allocator is used, and in this paper, the authors make a case for offloading memory allocation (and other similar management functions) from main processing cores to other processing units to boost performance, reduce energy consumption, and customize services to specific applications or application domains

VaWiRAM: A Variable Width Random Access Memory Module

In this paper, we present the design of a variable width RAM (VaWiRAM) which will be extremely useful in building flexible memory systems. Principles of dynamic reconfigurability of programmable logic and programmable interconnect is incorporated into random access memories to achieve this flexibility. The chip can be reconfigured by setting a few configuration pins on the memory chip. A VaWiRAM reconfigurable between widths 1 and Wmax can be constructed with the extra cost of Wmax \Gamma 1 pass gates, Wmax 2 2to -1 multiplexers, and dlog 2 [log 2 (k) + 1]e mode pins. The paper discusses the architecture of the proposed VaWiRAMs, and analyzes the trade-offs in their design. Keywords: Dynamically alterable memory, Programmable hardware, Reconfigurable Memory, Random Access Memory. 1 Introduction Processors now as always require more data per unit time than many standard memory chips have been designed to provide. The width of DRAMs available in the market is lower than the bus-wi..